BISM: Built-in Self Map for Crossbar Nano-Architectures

Bottom-up self-assembly process used in the fabrication of nanoscale devices yields significantly more defects compared to conventional top-down lithography used in CMOS fabrication. Therefore, applying defect tolerant design schemes is inevitable to be able to map the design to these programmable fabrics around defects. However, defect-aware design mapping could be very time consuming and complicated both at design time and post-fabrication configuration time. In this paper, we present an alternative approach for defect tolerant mapping in which the mapping phase is built into the programmable fabric and on-chip resources are used for defect-free mapping. This built-in self map (BISM) scheme significantly reduces the complexity of defect tolerance both at design time and post-fabrication configuration time.